Response in 12 hours
RFQ for CD4040Required Field
|Category||Integrated Circuits (ICs)|
|Logic Type||Binary Counter|
|Trigger Type||Negative Edge|
|Voltage - Supply||3 V ~ 15 V|
|Number of Bits per Element||12|
|Number of Elements||1 - Single|
|Mounting Type||Surface Mount|
|Package / Case||16-SOIC|
|Packaging||Tape & Reel (TR)|
|Operating Temperature||-55°C ~ 125°C|
|Lead Free Status||Lead Free|
|RoHS Status||RoHS Compliant|
|Other Names|| CD4040BCMX|
The circuit lets you convert a serial pulse stream or sinusoidal input to a sinusoidal output at 1/32 the frequency. By varying the frequency of VIN, you can achieve an output range of 107:1-from about 100 kHz to less than 0.01 Hz. The output resembles that of a 5-bit d/a converter operating on parallel digital data.
Counter IC1 generates binary codes that repeatedly scan the range from 00000 to 11111. The output amplifier adds the corresponding XOR gate outputs, VDD or ground, weighted by the values of input resistors R1 through R4. The 16 counter codes 00000 to 01111, for instance, pass unchanged to the XOR gate outputs, and cause VOUT to step through the half-sinusoidal cycle for maximum amplitude to minimum amplitude.
Counter output Q4 becomes high for the next 16 codes, causing the XOR gates to invert the Q0 through Q3 outputs. As a result, VOUT steps through the remaining half cycle from minimum to maximum amplitude. The counter then rolls over and initiates the next cycle. You can change the RI through R4 values to obtain other VOUT waveforms. VDD should be at least 12 V to assure maximum-frequency operation from IC1 to IC2.